Optimizing Rolling Hash Computation Using Simd Vector Registers

This technique can be conditionally used in certain environments depending on the nature of the rolling hash and the CPU capabilities available. A large vector register is used to hold the sliding window bytes and specialized vector instructions are used to shift the register bytes and add and remove bytes in the register. This simulates the behavior of a sliding window entirely in a CPU register.

Publication Date
16 April 2013

Tags
single instruction multiple data vectorized hash function X86 Processor Vector Instructions streaming SIMD Extensions advanced vector expressions sliding window rolling hash content-aware chunking data de-duplication


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